PERTANIKA JOURNAL OF SCIENCE AND TECHNOLOGY

Clonal selection algorithm and discrete Hopfield neural network are extensively employed for solving higher-order optimization problems ranging from the constraint satisfaction problem to complex pattern recognition. The modified clonal selection algorithm is a comprehensive and less iterative immune-inspired searching algorithm, utilized to search for the correct combination of instances for Very large-scale integrated (VLSI) circuit structure. In this research, the VLSI circuit framework consists of Boolean 3-Satisfiability instances with the different complexities and number of transistors are considered. Hence, a hybrid modified clonal selection algorithm with discrete Hopfield neural network is well developed to optimize the configuration of VLSI circuits with different number of electronic components such as transistors as the instances. Therefore, the performance of the developed hybrid model was assessed experimentally with the standard models, HNNVLSI-3SATES and HNNVLSI-3SATGA in term of circuit accuracy, sensitivity, robustness and runtime to complete the verification process. The results have demonstrated the developed model, HNNVLSI-3SATCSA produced a minimum error (consistently approaching 0), better accuracy (more than 80%) and faster computational time (less than 125 seconds) against changes in the complexity in term of the number of transistors. Furthermore, the developed hybrid model is able to minimize the computational burden and configurational noises for the variant of VLSI circuits.